As the dimensions of semiconductor devices continue to shrink, various issues arise imposing increasing demands for methodology enabling patterning of smaller features without sacrificing pattern profiles. Previous methods of patterning smaller features resulted in poor pattern profiles and in insufficient critical dimension (CD) shrink. Known solutions to the problem include extreme ultraviolet (EUV) lithography and electron beam (e-Beam) lithography. However, both methods are expensive, and thus do not provide satisfactory manufacturing solutions. Another proposed solution involves low temperature oxide (LTO), or oxide spacer, CD shrink. However, LTO shrink has pattern density loading effects and the potential for defects.
A prior approach to form small features, such as stacked poly gates and densely packed contacts and metal lines, is illustrated in FIGS. 1A-1D and employs a silicon antireflective coating (SiARC)/hard mask (HM) shrink. The method employs an amorphous carbon HM, as amorphous carbon allows high etch selectivity to films typically used in the semiconductor industry, i.e., it exhibits good plasma etch selectivity during oxide or nitride etches, and it can be easily removed with an oxygen plasma.
Adverting to FIG. 1A, substrate 101, the layer to be patterned, can be an insulating layer, a semiconductor layer, such as bulk silicon or silicon germanium, or a metal layer. Amorphous carbon layer 103, i.e., the HM, antireflective coating (ARC) 105, and resist 107 are consecutively formed over substrate 101.
As illustrated in FIG. 1B, resist 107 is etched to form an opening 109 which is larger than the desired feature size. The resist is used as a mask to etch ARC 105 in FIG. 1C. ARC shrink is employed to enable smaller feature patterning. In other words, ARC 105 is etched with a tapered profile 111 to form an opening that converges from upper opening 109 to a smaller lower opening 113. Amorphous carbon layer 103 is also etched with a tapered profile 117 to further reduce the feature size in the substrate. The resulting amorphous carbon layer 103 is used as a mask for patterning substrate 101.
It was found, however, that when substrate 101 is etched, the tapering in carbon layer 103 created an environment that induced a significant degree of high bias ion reflection resulting in bowing 119 illustrated in FIG. 1D and, consequently poor profiles, thereby limiting CD shrink capability.
A need therefore exists for methodology enabling formation of smaller features without sacrificing pattern profiles.